activity
20052023
most citedDiagnosis of weaknesses in modern error correction codes: a physics approach

77 citations · 377 across the 27 of their papers we have counts for

collaborators

29 papers

quant-ph2023★ 14 cited

Constant-Overhead Fault-Tolerant Quantum Computation with Reconfigurable Atom Arrays

Qian Xu, J. Pablo Bonilla Ataides, Christopher A. Pattison +7

Quantum low-density parity-check (qLDPC) codes can achieve high encoding rates and good code distance scaling, providing a promising route to low-overhead fault-tolerant quantum co…

cs.MM2023★ 1 cited

Neuro-OSVETA: A Robust Watermarking of 3D Meshes

Bata Vasc, Nithin Raveendran, Bane Vasic

Best and practical watermarking schemes for copyright protection of 3D meshes are required to be blind and robust to attacks and errors. In this paper, we present the latest develo…

cs.IT2021★ 2 cited

FAID Diversity via Neural Networks

Xin Xiao, Nithin Raveendran, Bane Vasic +2

Decoder diversity is a powerful error correction framework in which a collection of decoders collaboratively correct a set of error patterns otherwise uncorrectable by any individu…

cs.IT2016

Check-hybrid GLDPC Codes: Systematic Elimination of Trapping Sets and Guaranteed Error Correction Capability

Vida Ravanmehr, Mehrdad Khatami, David Declercq +1

In this paper, we propose a new approach to construct a class of check-hybrid generalized low-density parity-check (CH-GLDPC) codes which are free of small trapping sets. The appro…

cs.IT2015

Majority Logic Decoding under Data-Dependent Logic Gate Failures

Srdan Brkic, Predrag Ivanis, Bane Vasic

A majority logic decoder made of unreliable logic gates, whose failures are transient and datadependent, is analyzed. Based on a combinatorial representation of fault configuration…

cs.IT2014★ 20 cited

Analysis and Design of Finite Alphabet Iterative Decoders Robust to Faulty Hardware

Elsa Dupraz, David Declercq, Bane Vasic +1

This paper addresses the problem of designing LDPC decoders robust to transient errors introduced by a faulty hardware. We assume that the faulty hardware introduces errors during…