activity
20192025
most citedA "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design

78 citations · 225 across the 19 of their papers we have counts for

collaborators
Showing 2023Show all

6 papers · 1 filter

cs.AR2023★ 34 cited

Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV 1.0 Compliant Open-Source Processor

Matteo Perotti, Matheus Cavalcante, Renzo Andri +2

Vector processing is highly effective in boosting processor performance and efficiency for data-parallel workloads. In this paper, we present Ara2, the first fully open-source vect…

cs.AR2023★ 2 cited

Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency

Matteo Perotti, Samuel Riedel, Matheus Cavalcante +1

The ever-increasing computational and storage requirements of modern applications and the slowdown of technology scaling pose major challenges to designing and implementing efficie…

cs.AR2023

PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge

Vikram Jain, Matheus Cavalcante, Nazareno Bruschi +6

Emerging deep neural network (DNN) applications require high-performance multi-core hardware acceleration with large data bursts. Classical network-on-chips (NoCs) use serial packe…

cs.AR2023★ 11 cited

FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic

Tim Fischer, Michael Rogenmoser, Matheus Cavalcante +2

Meeting the staggering bandwidth requirements of today's applications challenges the traditional narrow and serialized NoCs, which hit hard bounds on the maximum operating frequenc…

cs.AR2023★ 24 cited

MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory

Samuel Riedel, Matheus Cavalcante, Renzo Andri +1

Shared L1 memory clusters are a common architectural pattern (e.g., in GPGPUs) for building efficient and flexible multi-processing-element (PE) engines. However, it is a common be…

cs.AR2023

Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference

MohammadHossein AskariHemmat, Theo Dupuis, Yoan Fournier +8

In this paper, we present Quark, an integer RISC-V vector processor specifically tailored for sub-byte DNN inference. Quark is implemented in GlobalFoundries' 22FDX FD-SOI technolo…