2 papers
cs.CY2024
STT-RAM-based Hierarchical In-Memory Computing
Dhruv Gajaria, Kevin Antony Gomez, Tosiron Adegbija
In-memory computing promises to overcome the von Neumann bottleneck in computer systems by performing computations directly within the memory. Previous research has suggested using…
cs.CY2024
CHIME: Energy-Efficient STT-RAM-based Concurrent Hierarchical In-Memory Processing
Dhruv Gajaria, Tosiron Adegbija, Kevin Gomez
Processing-in-cache (PiC) and Processing-in-memory (PiM) architectures, especially those utilizing bit-line computing, offer promising solutions to mitigate data movement bottlenec…