2 papers
cs.AR2024
R-HLS: An IR for Dynamic High-Level Synthesis and Memory Disambiguation based on Regions and State Edges
David Metz, Nico Reissmann, Magnus Själander
Dynamically scheduled hardware enables high-level synthesis (HLS) for applications with irregular control flow and latencies, which perform poorly with conventional statically sche…
cs.DC2024
EPIC: An Energy-Efficient, High-Performance GPGPU Computing Research Infrastructure
Magnus Själander, Magnus Jahre, Gunnar Tufte +1
The pursuit of many research questions requires massive computational resources. State-of-the-art research in physical processes using simulations, the training of neural networks…