collaborators

1 paper

cs.LO2024

A rewriting-logic-with-SMT-based formal analysis and parameter synthesis framework for parametric time Petri nets

Jaime Arias, Kyungmin Bae, Carlos Olarte +2

This paper presents a concrete and a symbolic rewriting logic semantics for parametric time Petri nets with inhibitor arcs (PITPNs), a flexible model of timed systems where paramet…