2 citations · 2 across the 2 of their papers we have counts for
2 papers
cs.RO2008
Design and Implementation a 8 bits Pipeline Analog to Digital Converter in the Technology 0.6 μm CMOS Process
Eri Prasetyo, Dominique Ginhac, Michel Paindavoine
This paper describes a 8 bits, 20 Msamples/s pipeline analog-to-digital converter implemented in 0.6 μm CMOS technology with a total power dissipation of 75.47 mW. Circuit techniqu…
cs.RO2008★ 2 cited
A 8 bits Pipeline Analog to Digital Converter Design for High Speed Camera Application
Eri Prasetyo, Hamzah Afandi, Nurul Huda Dominique Ginhac +1
- This paper describes a pipeline analog-to-digital converter is implemented for high speed camera. In the pipeline ADC design, prime factor is designing operational amplifier with…