2 papers
cs.AR2023
Custom Memory Design for Logic-in-Memory: Drawbacks and Improvements over Conventional Memories
Fabrizio Ottati, Giovanna Turvani, Marco Vacca +1
The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part…
cs.AR2023
Simulation Environment with Customized RISC-V Instructions for Logic-in-Memory Architectures
Jia-Hui Su, Chen-Hua Lu, Jenq Kuen Lee +5
Nowadays, various memory-hungry applications like machine learning algorithms are knocking "the memory wall". Toward this, emerging memories featuring computational capacity are fo…