most citedTest-driving RISC-V Vector hardware for HPC

2 citations · 2 across the 2 of their papers we have counts for

collaborators

2 papers

cs.DC2023★ 2 cited

Test-driving RISC-V Vector hardware for HPC

Joseph K. L. Lee, Maurice Jamieson, Nick Brown +1

Whilst the RISC-V Vector extension (RVV) has been ratified, at the time of writing both hardware implementations and open source software support are still limited for vectorisatio…

cs.DC2023

Morpheus unleashed: Fast cross-platform SpMV on emerging architectures

Christodoulos Stylianou, Mark Klaisoongnoen, Ricardo Jesus +2

Sparse matrices and linear algebra are at the heart of scientific simulations. Over the years, more than 70 sparse matrix storage formats have been developed, targeting a wide rang…