23 citations · 59 across the 6 of their papers we have counts for
6 papers
Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes
Michele Caon, Clément Choné, Pasquale Davide Schiavone +4
The widespread adoption of data-centric algorithms, particularly Artificial Intelligence (AI) and Machine Learning (ML), has exposed the limitations of centralized processing infra…
A Soft SIMD Based Energy Efficient Computing Microarchitecture
Pengbo Yu, Alexandre Levisse, Mohit Gupta +4
The ever-increasing size and computational complexity of today's machine-learning algorithms pose an increasing strain on the underlying hardware. In this light, novel and dedicate…
Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference
Marco Rios, Flavio Ponzina, Alexandre Levisse +2
By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the arra…
ALPINE: Analog In-Memory Acceleration with Tight Processor Integration for Deep Learning
Joshua Klein, Irem Boybat, Yasir Qureshi +6
Analog in-memory computing (AIMC) cores offers significant performance and energy benefits for neural network inference with respect to digital logic (e.g., CPUs). AIMCs accelerate…
An Error-Based Approximation Sensing Circuit for Event-Triggered, Low Power Wearable Sensors
Silvio Zanoli, Flavio Ponzina, Tomás Teijeiro +2
Event-based sensors have the potential to optimize energy consumption at every stage in the signal processing pipeline, including data acquisition, transmission, processing and sto…
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors
Sergi Abadal, Robert Guirado, Hamidreza Taghvaee +18
The main design principles in computer architecture have recently shifted from a monolithic scaling-driven approach to the development of heterogeneous architectures that tightly c…