6 citations · 6 across the 2 of their papers we have counts for
3 papers
Logic and Reduction Operation based Hardware Trojans in Digital Design
Mayukhmali Das, Sounak Dutta, Sayan Chatterjee
In this paper, we will demonstrate Hardware Trojan Attacks on four different digital designs implemented on FPGA. The hardware trojan is activated based on special logical and redu…
Row-Based Dual Vdd Assignment, for a Level Converter Free CSA Design and Its Near-Threshold Operation
Dipankar Saha, Aanan Chatterjee, Sayan Chatterjee +1
Subthreshold circuit designs are very much popular for some of the ultra low power applications, where the minimum energy consumption is the primary concern. But, due to the weak d…
Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit
Dipankar Saha, Subhramita Basak, Sagar Mukherjee +2
A modular, programmable, and high performance Power Gating strategy, called cluster based tunable sleep transistor cell Power Gating, has been introduced in the present paper with…