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20222025
most citedChipNeMo: Domain-Adapted LLMs for Chip Design

28 citations · 66 across the 10 of their papers we have counts for

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Showing 2024Show all

4 papers · 1 filter

cs.AR2024★ 1 cited

FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware

Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad +2

The remarkable reasoning and code generation capabilities of large language models (LLMs) have spurred significant interest in applying LLMs to enable task automation in digital ch…

cs.AR2024★ 2 cited

CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair

Mingjie Liu, Yun-Da Tsai, Wenfei Zhou +1

Despite the significant progress made in code generation with large language models, challenges persist, especially with hardware description languages such as Verilog. This paper…

cs.SE2024★ 5 cited

Code Less, Align More: Efficient LLM Fine-tuning for Code Generation with Data Pruning

Yun-Da Tsai, Mingjie Liu, Haoxing Ren

Recent work targeting large language models (LLMs) for code generation demonstrated that increasing the amount of training data through synthetic code generation often leads to exc…

cs.AI2024

Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance

Amit Sharma, Teodor-Dumitru Ene, Kishor Kunal +3

This paper presents a comparative analysis of total cost of ownership (TCO) and performance between domain-adapted large language models (LLM) and state-of-the-art (SoTA) LLMs , wi…