21 citations · 36 across the 13 of their papers we have counts for
16 papers
AgentPerfBench: A Benchmarking and Evaluation Suite for Inference Performance of Agentic LLMs
Cheuk Hang Lau, Zeyu Cao, Kevin Wong Cheuk Yin +6
The optimization of LLM serving engines, such as vLLM and SGLang, is largely benchmark-driven: optimizations, scheduling policies, hardware and system designs are all selected base…
LithoGRPO: Fast Inverse Lithography via GRPO Reinforced Flow Matching
Yao Lai, Xuyuan Xiong, Zeyue Xue +7
In semiconductor manufacturing, lithography projects circuit layouts onto silicon wafers through an optical mask. As circuit features shrink below the wavelength of light, optical…
ClawMark: A Living-World Benchmark for Multi-Turn, Multi-Day, Multimodal Coworker Agents
Fanqing Meng, Lingxiao Du, Zijian Wu +46
Language-model agents are increasingly used as persistent coworkers that assist users across multiple working days. During such workflows, the surrounding environment may change in…
AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrieval
Yihan Wang, Lei Li, Yao Lai +2
Analog circuit design relies heavily on reusing existing intellectual property (IP), yet searching across heterogeneous representations such as SPICE netlists, schematics, and func…
MemExplorer: Navigating the Heterogeneous Memory Design Space for Agentic Inference NPUs
Haoran Wu, Zeyu Cao, Yao Lai +16
Emerging agentic large language model (LLM) workloads are driving rapidly growing demand for memory capacity and bandwidth. Different phases of inference, such as prefill and decod…
KernelCraft: Benchmarking for Agentic Close-to-Metal Kernel Generation on Emerging Hardware
Jiayi Nie, Haoran Wu, Yao Lai +9
New AI accelerators with novel instruction set architectures (ISAs) often require developers to manually craft low-level kernels, a time-consuming and error-prone process that does…
NPU Design for Diffusion Language Model Inference
Binglei Lou, Haoran Wu, Kevin Lau +9
Diffusion-based LLMs (dLLMs) fundamentally depart from traditional autoregressive (AR) LLM inference: they leverage bidirectional attention, block-wise KV cache refreshing, cross-s…
AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
Yao Lai, Souradip Poddar, Sungyoung Lee +5
Despite recent advances, analog front-end design still relies heavily on expert intuition and iterative simulations, which limits the potential for automation. We present AnalogCod…
FUDOKI: Discrete Flow-based Unified Understanding and Generation via Kinetic-Optimal Velocities
Jin Wang, Yao Lai, Aoxue Li +6
The rapid progress of large language models (LLMs) has catalyzed the emergence of multimodal large language models (MLLMs) that unify visual understanding and image generation with…
DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining
Sungyoung Lee, Ziyi Wang, Seunggeun Kim +3
Pretraining models with unsupervised graph representation learning has led to significant advancements in domains such as social network analysis, molecular design, and electronic…
INSIGHT: Universal Neural Simulator for Analog Circuits Harnessing Autoregressive Transformers
Souradip Poddar, Youngmin Oh, Yao Lai +3
Analog front-end design heavily relies on specialized human expertise and costly trial-and-error simulations, which motivated many prior works on analog design automation. However,…
LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation
Guojin Chen, Keren Zhu, Seunggeun Kim +4
Analog layout synthesis faces significant challenges due to its dependence on manual processes, considerable time requirements, and performance instability. Current Bayesian Optimi…
AnalogCoder: Analog Circuit Design via Training-Free Code Generation
Yao Lai, Sungyoung Lee, Guojin Chen +4
Analog circuit design is a significant task in modern chip technology, focusing on the selection of component types, connectivity, and parameters to ensure proper circuit functiona…
Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs
Yao Lai, Jinxin Liu, David Z. Pan +1
Across a wide range of hardware scenarios, the computational efficiency and physical size of the arithmetic units significantly influence the speed and footprint of the overall har…
ChiPFormer: Transferable Chip Placement via Offline Decision Transformer
Yao Lai, Jinxin Liu, Zhentao Tang +3
Placement is a critical step in modern chip design, aiming to determine the positions of circuit modules on the chip canvas. Recent works have shown that reinforcement learning (RL…
MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learning
Yao Lai, Yao Mu, Ping Luo
Placement is an essential task in modern chip design, aiming at placing millions of circuit modules on a 2D chip canvas. Unlike the human-centric solution, which requires months of…