4 citations · 4 across the 2 of their papers we have counts for
2 papers
cs.LG2024
NeuroSteiner: A Graph Transformer for Wirelength Estimation
Sahil Manchanda, Dana Kianfar, Markus Peschl +2
A core objective of physical design is to minimize wirelength (WL) when placing chip components on a canvas. Computing the minimal WL of a placement requires finding rectilinear St…
cs.LG2022★ 4 cited
Bayesian Optimization for Macro Placement
Changyong Oh, Roberto Bondesan, Dana Kianfar +6
Macro placement is the problem of placing memory blocks on a chip canvas. It can be formulated as a combinatorial optimization problem over sequence pairs, a representation which d…