1 citations · 1 across the 2 of their papers we have counts for
5 papers · 1 filter
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
Ataberk Olgun, Hasan Hassan, A. Giray YaÄlıkçı +6
To understand and improve DRAM performance, reliability, security and energy efficiency, prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art…
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations
Hasan Hassan, Ataberk Olgun, A. Giray Yaglikci +2
The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) to reliably operate modern DRAM chips. Implementi…
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications
Jawad Haj Yahya, Haris Volos, Davide B. Bartolini +9
User-facing applications running in modern datacenters exhibit irregular request patterns and are implemented using a multitude of services with tight latency requirements. These c…
A Modern Primer on Processing in Memory
Onur Mutlu, Saugata Ghose, Juan Gómez-Luna +3
This paper discusses recent research that aims to enable computation close to data, an approach we broadly call processing-in-memory (PIM). PIM places computation mechanisms in or…
pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables
João Dinis Ferreira, Gabriel Falcao, Juan Gómez-Luna +8
Data movement between the main memory and the processor is a key contributor to execution time and energy consumption in memory-intensive applications. This data movement bottlenec…