3 papers
cs.AR2025
LinkBo: An Adaptive Single-Wire, Low-Latency, and Fault-Tolerant Communications Interface for Variable-Distance Chip-to-Chip Systems
Bochen Ye, Gustavo Naspolini, Kimmo Salo +1
Cost-effective embedded systems necessitate utilizing the single-wire communication protocol for inter-chip communication, thanks to its reduced pin count in comparison to the mult…
cs.AR2025
A Unified Framework for Mapping and Synthesis of Approximate R-Blocks CGRAs
Georgios Alexandris, Panagiotis Chaidos, Alexis Maras +5
The ever-increasing complexity and operational diversity of modern Neural Networks (NNs) have caused the need for low-power and, at the same time, high-performance edge devices for…
cs.NE2024
Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors
Alberto Patino-Saucedo, Roy Meijer, Amirreza Yousefzadeh +6
Configurable synaptic delays are a basic feature in many neuromorphic neural network hardware accelerators. However, they have been rarely used in model implementations, despite th…