2 citations · 2 across the 4 of their papers we have counts for
4 papers
Hexagon-MLIR: An AI Compilation Stack For Qualcomm's Neural Processing Units (NPUs)
Mohammed Javed Absar, Muthu Baskaran, Abhikrant Sharma +22
In this paper, we present Hexagon-MLIR,an open-source compilation stack that targets Qualcomm Hexagon Neural Processing Unit (NPU) and provides unified support for lowering Triton…
Guac: Energy-Aware and SSA-Based Generation of Coarse-Grained Merged Accelerators from LLVM-IR
Iulian Brumar, Rodrigo Rocha, Alex Bernat +3
Designing accelerators for resource- and power-constrained applications is a daunting task. High-level Synthesis (HLS) addresses these constraints through resource sharing, an opti…
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration
Georgios Zacharopoulos, Adel Ejjeh, Ying Jing +9
The design of heterogeneous systems that include domain specific accelerators is a challenging and time-consuming process. While taking into account area constraints, designers mus…
Early DSE and Automatic Generation of Coarse Grained Merged Accelerators
Iulian Brumar, Georgios Zacharopoulos, Yuan Yao +3
Post-Moore's law area-constrained systems rely on accelerators to deliver performance enhancements. Coarse grained accelerators can offer substantial domain acceleration, but manua…