4 citations · 6 across the 2 of their papers we have counts for
2 papers
cs.AR2022★ 2 cited
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration
Georgios Zacharopoulos, Adel Ejjeh, Ying Jing +9
The design of heterogeneous systems that include domain specific accelerators is a challenging and time-consuming process. While taking into account area constraints, designers mus…
cs.AR2022★ 4 cited
Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL
Adel Ejjeh, Vikram Adve, Rob Rutenbar
High Level Synthesis (HLS) tools, like the Intel FPGA SDK for OpenCL, improve design productivity and enable efficient design space exploration guided by simple program directives…