10 citations · 35 across the 23 of their papers we have counts for
4 papers · 1 filter
Multimodal Chip Physical Design Engineer Assistant
Yun-Da Tsai, Chang-Yu Chao, Liang-Yeh Shen +7
Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving…
ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generation
Chenhui Deng, Yun-Da Tsai, Guan-Ting Liu +2
Recent advances in large language models (LLMs) have enabled near-human performance on software coding benchmarks, but their effectiveness in RTL code generation remains limited du…
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair
Mingjie Liu, Yun-Da Tsai, Wenfei Zhou +1
Despite the significant progress made in code generation with large language models, challenges persist, especially with hardware description languages such as Verilog. This paper…
RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Models
Yun-Da Tsai, Mingjie Liu, Haoxing Ren
This paper presents RTLFixer, a novel framework enabling automatic syntax errors fixing for Verilog code with Large Language Models (LLMs). Despite LLM's promising capabilities, ou…