3 papers
cs.CR2026
ANTMAN: An Efficient and Interpretable RTL-Level Run-Time Detection Framework for Stealthy Branch Predictor Attacks on BOOM
Muhammad Hassan, Maria Mushtaq, Jaan Raik +1
Runtime detection of microarchitectural side channel attacks remains significantly underexplored in RISCV compared with x86 and ARM ISAs, posing a serious threat to critical applic…
cs.CR2025
DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
Muhammad Hassan, Maria Mushtaq, Jaan Raik +1
RISC-V processors are becoming ubiquitous in critical applications, but their susceptibility to microarchitectural side-channel attacks is a serious concern. Detection of microarch…
cs.AR2024
RISC-V V Vector Extension (RVV) with reduced number of vector registers
Eino Jacobs, Dmitry Utyansky, Muhammad Hassan +1
To reduce the area of RISC-V Vector extension (RVV) in small processors, the authors are considering one simple modification: reduce the number of registers in the vector register…