1 citations · 1 across the 2 of their papers we have counts for
4 papers
SwiftCTS: Fast Cross-Design Prediction and Pareto Optimization of Clock Tree Metrics via Few-Shot Calibration
Barsat Khadka, Kawsher Roxy, Md Rubel Ahmed
Clock Tree Synthesis (CTS) is a computationally expensive stage in the physical design flow, requiring iterative EDA tool invocations to navigate a vast configuration space for opt…
CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesis
Barsat Khadka, Kawsher Roxy, Md Rubel Ahmed
Graph Neural Networks (GNNs) are increasingly explored for physical design analysis in Electronic Design Automation, particularly for modeling Clock Tree Synthesis behavior such as…
EdgeProfiler: A Fast Profiling Framework for Lightweight LLMs on Edge Using Analytical Model
Alyssa Pinnock, Shakya Jayakody, Kawsher A Roxy +1
This paper introduces EdgeProfiler, a fast profiling framework designed for evaluating lightweight Large Language Models (LLMs) on edge systems. While LLMs offer remarkable capabil…
Pinning Fault Mode Modeling for DWM Shifting
Kawsher Roxy, Stephen Longofono, Sebastien Olliver +2
Extreme scaling for purposes of achieving higher density and lower energy continues to increase the probability of memory faults. For domain wall (DW) memories, misalignment faults…