2 papers
cs.AR2022
TPPD: Targeted Pseudo Partitioning based Defence for Cross-Core Covert Channel Attacks
Jaspinder Kaur, Shirshendu Das
Contemporary computing employs cache hierarchy to fill the speed gap between processors and main memories. In order to optimise system performance, Last Level Caches(LLC) are share…
cs.AR2022
VAR-DRAM: Variation-Aware Framework for Efficient Dynamic Random Access Memory Design
Kaustav Goswami, Hemanta Kumar Mondal, Shirshendu Das +1
Dynamic Random Access Memory (DRAM) is the de-facto choice for main memory devices due to its cost-effectiveness. It offers a larger capacity and higher bandwidth compared to SRAM…