22 citations · 60 across the 5 of their papers we have counts for
5 papers
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini +5
Oracle-less machine learning (ML) attacks have broken various logic locking schemes. Regular synthesis, which is tailored for area-power-delay optimization, yields netlists where k…
Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design
Baleegh Ahmad, Wei-Kai Liu, Luca Collini +9
To help prevent hardware security vulnerabilities from propagating to later design stages where fixes are costly, it is crucial to identify security concerns as early as possible,…
ALICE: An Automatic Design Flow for eFPGA Redaction
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari +6
Fabricating an integrated circuit is becoming unaffordable for many semiconductor design houses. Outsourcing the fabrication to a third-party foundry requires methods to protect th…
Designing ML-Resilient Locking at Register-Transfer Level
Dominik Sisejkovic, Luca Collini, Benjamin Tan +3
Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are…
Optimizing the Use of Behavioral Locking for High-Level Synthesis
Christian Pilato, Luca Collini, Luca Cassano +3
The globalization of the electronics supply chain requires effective methods to thwart reverse engineering and IP theft. Logic locking is a promising solution, but there are many o…