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physics.ins-det2025
An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 ps Adjustable Steps Implemented in FPGA
Jin-yuan Wu
In TDC testing or timing system implementation tasks, it is often desirable to generate signal pulses with fine adjustable time intervals. In delay cell-based schemes, the time adj…
physics.ins-det2020★ 23 cited
A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade
Wei Zhang, Hanhan Sun, Christopher Edwards +11
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGA…