4 citations · 8 across the 10 of their papers we have counts for
11 papers
System-Level Isolation for Mixed-Criticality RISC-V SoCs: A "World" Reality Check
Luis Cunha, Jose Martins, Manuel Rodriguez +7
As RISC-V adoption accelerates, domains such as automotive, the Internet of Things (IoT), and industrial control are attracting growing attention. These domains are subject to stri…
Beyond the Bermuda Triangle of Contention: IOMMU Interference in Mixed Criticality Systems
Diogo Costa, Jose Martins, Sandro Pinto
As Mixed Criticality Systems (MCSs) evolve, they increasingly integrate heterogeneous computing platforms, combining general-purpose processors with specialized accelerators such a…
H-MBR: Hypervisor-level Memory Bandwidth Reservation for Mixed Criticality Systems
Afonso Oliveira, Diogo Costa, Gonçalo Moreira +2
Recent advancements in fields such as automotive and aerospace have driven a growing demand for robust computational resources. Applications that were once designed for basic MCUs…
SP-IMPact: A Framework for Static Partitioning Interference Mitigation and Performance Analysis
Diogo Costa, Gonçalo Moreira, Afonso Oliveira +2
Modern embedded systems are evolving toward complex, heterogeneous architectures to accommodate increasingly demanding applications. Driven by SWAP-C constraints, this shift has le…
RISC-V Needs Secure 'Wheels': the MCU Initiator-Side Perspective
Sandro Pinto, Jose Martins, Manuel Rodriguez +5
The automotive industry is experiencing a massive paradigm shift. Cars are becoming increasingly autonomous, connected, and computerized. Modern electrical/electronic (E/E) archite…
IRQ Coloring and the Subtle Art of Mitigating Interrupt-generated Interference
Diogo Costa, Luca Cuomo, Daniel Oliveira +5
Integrating workloads with differing criticality levels presents a formidable challenge in achieving the stringent spatial and temporal isolation requirements imposed by safety-cri…
Shedding Light on Static Partitioning Hypervisors for Arm-based Mixed-Criticality Systems
José Martins, Sandro Pinto
In this paper, we aim to understand the properties and guarantees of static partitioning hypervisors (SPH) for Arm-based mixed-criticality systems (MCS). To this end, we performed…
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration
Bruno Sá, Luca Valente, José Martins +3
Virtualization is a key technology used in a wide range of applications, from cloud computing to embedded systems. Over the last few years, mainstream computer architectures were e…
Bao-Enclave: Virtualization-based Enclaves for Arm
Samuel Pereira, Joao Sousa, Sandro Pinto +2
General-purpose operating systems (GPOS), such as Linux, encompass several million lines of code. Statistically, a larger code base inevitably leads to a higher number of potential…
ReZone: Disarming TrustZone with TEE Privilege Reduction
David Cerdeira, José Martins, Nuno Santos +1
In TrustZone-assisted TEEs, the trusted OS has unrestricted access to both secure and normal world memory. Unfortunately, this architectural limitation has opened an aisle of explo…
A First Look at RISC-V Virtualization from an Embedded Systems Perspective
Bruno Sá, José Martins, Sandro Pinto
This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification in a Rocket chip c…