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cs.AR2026
TADA: Technology Aware DNN Accelerator Performance and Energy Estimator
Tanvi Sharma, Surya Selvam, Anand Raghunathan +1
Deep neural network (DNN) accelerators for edge inference must meet tight energy, latency, and area (EDP) constraints, and their optimal hardware architecture and dataflow configur…
cs.AR2026
Agentic Design Space Exploration for Joint Hardware Configuration Selection and Mapping of AI Inference Workloads on Heterogeneous Edge SoCs
Geetha Prasuna Yarramneni, Surya Selvam, Wilfried Haensch +1
Modern edge Systems-on-Chip (SoCs) integrate heterogeneous processing units (PUs) such as CPUs, GPUs, and NPUs, each with distinct performance and energy characteristics. Deploying…