activity
20202026
most citedField-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions

17 citations · 20 across the 11 of their papers we have counts for

collaborators

11 papers

cs.AR2026

From Patterns to Parsers: Automatic Generation of Efficient Hardware Parsers for FPGAs

Tushar Garg, Andrew Boutros

This work presents an open-source tool for automatically generating efficient hardware parsers from high-level specifications. It uses a parsing intermediate representation (PIR) t…

cs.AR2026

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions

Marwan Mekhemer, Ahmed Elsousy, Balaji Venkatesh +4

Modern deep learning workloads increasingly rely on narrow numerical formats to improve efficiency and reduce memory footprint. The recently standardized microscaling floating-poin…

cs.AR2026

Boosting FPGA Performance with Direct BRAM-DSP Paths

Jiajun Hu, Ruthwik Reddy Sunketa, Andrew Boutros +1

Efficient data movement between memory and compute units is a key performance bottleneck in modern FPGA designs, particularly for deep learning (DL) workloads. In typical FPGA arch…

cs.AR2026

Modeling, Optimizing and Exploring Multi-Die FPGA Routing Architectures

Amirhossein Poolad, Soheil Gholami Shahrouz, Andrew Boutros +1

Die stacking has enabled 2.5D FPGAs by integrating multiple active dice on a passive silicon interposer for improved yield and capacity, and paved the way for 3D architectures that…

cs.AR2026

Déjà Vu Packing: Optimizing FPGA Logic Clustering Runtime via Pattern Memoization

Milo Liebster, Amin Mohaghegh, Andrew Boutros

Implementing a digital circuit on an FPGA fabric requires clustering technology-mapped netlist primitives into coarser-granularity blocks that can be directly mapped to the physica…

cs.AR2025

Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage

Junius Pun, Xilai Dai, Grace Zgheib +4

Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement ar…

cs.AR2024★ 17 cited

Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions

Andrew Boutros, Aman Arora, Vaughn Betz

Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance require…

cs.AR2023★ 1 cited

RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices

Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz

With the continued growth in field-programmable gate array (FPGA) capacity and their incorporation into new environments such as datacenters, we have witnessed the introduction of…

cs.DC2022

FPGA-based AI Smart NICs for Scalable Distributed AI Training Systems

Rui Ma, Evangelos Georganas, Alexander Heinecke +2

Rapid advances in artificial intelligence (AI) technology have led to significant accuracy improvements in a myriad of application domains at the cost of larger and more compute-in…

cs.AR2021

Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research

Aman Arora, Andrew Boutros, Daniel Rauch +9

With the prevalence of deep learning (DL) in many applications, researchers are investigating different ways of optimizing FPGA architecture and CAD to achieve better quality-of-re…

cs.CR2020★ 2 cited

Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs

Andrew Boutros, Mathew Hall, Nicolas Papernot +1

Field-programmable gate arrays (FPGAs) are becoming widely used accelerators for a myriad of datacenter applications due to their flexibility and energy efficiency. Among these app…