6 citations · 6 across the 4 of their papers we have counts for
4 papers
Enhancing Large Language Models for Hardware Verification: A Novel SystemVerilog Assertion Dataset
Anand Menon, Samit S Miftah, Shamik Kundu +7
Hardware verification is crucial in modern SoC design, consuming around 70% of development time. SystemVerilog assertions ensure correct functionality. However, existing industrial…
Enhancing Functional Safety in Automotive AMS Circuits through Unsupervised Machine Learning
Ayush Arunachalam, Ian Kintz, Suvadeep Banerjee +7
Given the widespread use of safety-critical applications in the automotive field, it is crucial to ensure the Functional Safety (FuSa) of circuits and components within automotive…
A Highly Configurable Hardware/Software Stack for DNN Inference Acceleration
Suvadeep Banerjee, Steve Burns, Pasquale Cocchini +6
This work focuses on an efficient Agile design methodology for domain-specific accelerators. We employ feature-by-feature enhancement of a vertical development stack and apply it t…
RHNAS: Realizable Hardware and Neural Architecture Search
Yash Akhauri, Adithya Niranjan, J. Pablo Muñoz +6
The rapidly evolving field of Artificial Intelligence necessitates automated approaches to co-design neural network architecture and neural accelerators to maximize system efficien…