2 papers
cs.DC2024
Parendi: Thousand-Way Parallel RTL Simulation
Mahyar Emami, Thomas Bourgeat, James Larus
Hardware development critically depends on cycle-accurate RTL simulation. However, as chip complexity increases, conventional single-threaded simulation becomes impractical due to…
cs.AR2021
StreamBlocks: A compiler for heterogeneous dataflow computing (technical report)
Endri Bezati, Mahyar Emami, Jörn Janneck +1
To increase performance and efficiency, systems use FPGAs as reconfigurable accelerators. A key challenge in designing these systems is partitioning computation between processors…