4 papers
Dynamic Slack-Aware Clocking for Near-Threshold Tensor Processing Units (TPUs)
Muhammad Usman Nadeem, Sanghamitra Roy, Koushik Chakraborty
Operating Tensor Processing Units (TPUs) in the near-threshold computing (NTC) region significantly reduces energy consumption but introduces high delay sensitivity to process vari…
Probabilistic Verification for Modular Network-on-Chip Systems (extended version)
Nick Waddoups, Jonah Boe, Arnd Hartmanns +4
Quantitative verification can provide deep insights into reliable Network-On-Chip (NoC) designs. It is critical to understanding and mitigating operational issues caused by power s…
Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System
Riley Roberts, Benjamin Lewis, Arnd Hartmanns +4
Modern network-on-chip (NoC) systems face reliability issues due to process and environmental variations. The power supply noise (PSN) in the power delivery network of a NoC plays…
Towards Power Efficient DNN Accelerator Design on Reconfigurable Platform
Rourab Paul, Sreetama Sarkar, Suman Sau +3
The exponential emergence of Field Programmable Gate Array (FPGA) has accelerated the research of hardware implementation of Deep Neural Network (DNN). Among all DNN processors, do…