2 papers
cs.AR2026
HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMs
Chang-Chih Meng, Yu-Ren Lu, Guan-Yu Lin +3
Integrated Circuit (IC) verification consumes nearly 70% of the IC development cycle, and recent research leverages Large Language Models (LLMs) to automatically generate testbench…
cs.LG2021
FOX-NAS: Fast, On-device and Explainable Neural Architecture Search
Chia-Hsiang Liu, Yu-Shin Han, Yuan-Yao Sung +3
Neural architecture search can discover neural networks with good performance, and One-Shot approaches are prevalent. One-Shot approaches typically require a supernet with weight s…