activity
20202024
most citedCAP-RAM: A Charge-Domain In-Memory Computing 6T-SRAM for Accurate and Precision-Programmable CNN Inference

133 citations · 171 across the 7 of their papers we have counts for

collaborators

8 papers

cs.AR2024★ 2 cited

PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout

Zhiyu Chen, Ziyuan Wen, Weier Wan +6

Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-eff…

cs.CL2023★ 6 cited

Outlier Suppression+: Accurate quantization of large language models by equivalent and optimal shifting and scaling

Xiuying Wei, Yunchen Zhang, Yuhang Li +4

Post-training quantization~(PTQ) of transformer language models faces significant challenges due to the existence of detrimental outliers in activations. We observe that these outl…

cs.LG2022★ 4 cited

PIM-QAT: Neural Network Quantization for Processing-In-Memory (PIM) Systems

Qing Jin, Zhiyu Chen, Jian Ren +3

Processing-in-memory (PIM), an increasingly studied neuromorphic hardware, promises orders of energy and throughput improvements for deep learning inference. Leveraging the massive…

cs.CV2022★ 21 cited

F8Net: Fixed-Point 8-bit Only Multiplication for Network Quantization

Qing Jin, Jian Ren, Richard Zhuang +6

Neural network quantization is a promising compression technique to reduce memory footprint and save energy consumption, potentially leading to real-time inference. However, there…

cs.LG2021

Training BatchNorm Only in Neural Architecture Search and Beyond

Yichen Zhu, Jie Du, Yuqin Zhu +4

This work investigates the usage of batch normalization in neural architecture search (NAS). Specifically, Frankle et al. find that training BatchNorm only can achieve nontrivial p…

cs.AR2021

Programmable FPGA-based Memory Controller

Sasindu Wijeratne, Sanket Pattnaik, Zhiyu Chen +2

Even with generational improvements in DRAM technology, memory access latency still remains the major bottleneck for application accelerators, primarily due to limitations in memor…

cs.AR2021★ 133 cited

CAP-RAM: A Charge-Domain In-Memory Computing 6T-SRAM for Accurate and Precision-Programmable CNN Inference

Zhiyu Chen, Zhanghao Yu, Qing Jin +6

A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional ne…

cs.LG2020★ 5 cited

NPAS: A Compiler-aware Framework of Unified Network Pruning and Architecture Search for Beyond Real-Time Mobile Acceleration

Zhengang Li, Geng Yuan, Wei Niu +13

With the increasing demand to efficiently deploy DNNs on mobile edge devices, it becomes much more important to reduce unnecessary computation and increase the execution speed. Pri…