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cs.AR2023
A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation
Zihan Yin, Annewsha Datta, Shwetha Vijayakumar +2
Security and energy-efficiency are critical for computing applications in general and for edge applications in particular. Digital in-Memory Computing (IMC) in SRAM cells have wide…
cs.AR2021★ 1 cited
Augmented Memory Computing: Dynamically Augmented SRAM Storage for Data Intensive Applications
Haripriya Sheshadri, Shwetha Vijayakumar, Ajey Jacob +1
In this paper, we propose a novel memory-centric scheme based on CMOS SRAM for acceleration of data intensive applications. Our proposal aims at dynamically increasing the on-chip…