256 citations · 469 across the 4 of their papers we have counts for
4 papers
Device-to-System Performance Evaluation: from Transistor/Interconnect Modeling to VLSI Physical Design and Neural-Network Predictor
Chi-Shuen Lee, Brian Cline, Saurabh Sinha +2
We present a DevIce-to-System Performance EvaLuation (DISPEL) workflow that integrates transistor and interconnect modeling, parasitic extraction, standard cell library characteriz…
Rapid Co-optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations
Gage Hills, Jie Zhang, Max Marcel Shulaker +5
Carbon nanotube field-effect transistors (CNFETs) are promising candidates for building energy-efficient digital systems at highly-scaled technology nodes. However, carbon nanotube…
A Compact Virtual-Source Model for Carbon Nanotube Field-Effect Transistors in the Sub-10-nm Regime - Part II Extrinsic Elements, Performance Assessment, and Design Optimization
Chi-Shuen Lee, Eric Pop, Aaron D. Franklin +2
We present a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) including contact resistance, direct source-to-drain and band-to-band tunnelin…
A Compact Virtual-Source Model for Carbon Nanotube Field-Effect Transistors in the Sub-10-nm Regime-Part I Intrinsic Elements
Chi-Shuen Lee, Eric Pop, Aaron D. Franklin +2
We presents a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) based on the virtual-source (VS) approach, describing the intrinsic current-v…