14 citations · 14 across the 2 of their papers we have counts for
2 papers
quant-ph2009
A Fault Tolerant, Area Efficient Architecture for Shor's Factoring Algorithm
Mark G. Whitney, Nemanja Isailovic, Yatish Patel +1
We optimize the area and latency of Shor's factoring while simultaneously improving fault tolerance through: (1) balancing the use of ancilla generators, (2) aggressive optimizatio…
quant-ph2007★ 14 cited
Automated Generation of Layout and Control for Quantum Circuits
Mark Whitney, Nemanja Isailovic, Yatish Patel +1
We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we inv…