3 papers
cs.CE2025
Design and Verification of a Synchronus First In First Out (FIFO)
Yatheeswar Penta, Riadul Islam
This project focuses on designing and verifying a synchronous FIFO First In First Out (FIFO) memory, a critical component in digital systems for temporary data storage and seamless…
cs.CV2025
Event-Based Crossing Dataset (EBCD)
Joey Mulé, Dhandeep Challagundla, Rachit Saini +1
Event-based vision revolutionizes traditional image sensing by capturing asynchronous intensity variations rather than static frames, enabling ultrafast temporal resolution, sparse…
cs.AR2024
Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM)
Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
While general-purpose computing follows Von Neumann's architecture, the data movement between memory and processor elements dictates the processor's performance. The evolving compu…