activity
20182024
most citedWhen Do You Start Counting? Revisiting Counting and Pnueli Modalities in Timed Logics

1 citations · 1 across the 3 of their papers we have counts for

collaborators

6 papers

cs.LO20241 cited

When Do You Start Counting? Revisiting Counting and Pnueli Modalities in Timed Logics

Hsi-Ming Ho, Khushraj Madnani

Pnueli first noticed that certain simple 'counting' properties appear to be inexpressible in popular timed temporal logics such as Metric Interval Temporal Logic (MITL). This inter…

cs.LO2024

An efficient quantifier elimination procedure for Presburger arithmetic

Christoph Haase, Shankara Narayanan Krishna, Khushraj Madnani +2

All known quantifier elimination procedures for Presburger arithmetic require doubly exponential time for eliminating a single block of existentially quantified variables. It has e…

cs.FL2022

A Simpler Alternative: Minimizing Transition Systems Modulo Alternating Simulation Equivalence

Gabriel de Albuquerque Gleizer, Khushraj Nanik Madnani, Manuel Mazo

This paper studies the reduction (abstraction) of finite-state transition systems for control synthesis problems. We revisit the notion of alternating simulation equivalence (ASE),…

eess.SY2021

Self-Triggered Control for Near-Maximal Average Inter-Sample Time

Gabriel de Albuquerque Gleizer, Khushraj Madnani, Manuel Mazo

Self-triggered control (STC) is a sample-and-hold control method aimed at reducing communications within networked-control systems; however, existing STC mechanisms often maximize…

cs.LO2021

Generalizing Non-Punctuality for Timed Temporal Logic with Freeze Quantifiers

Shankara Narayanan Krishna, Khushraj Madnani, Manuel Mazo +1

Metric Temporal Logic (MTL) and Timed Propositional Temporal Logic (TPTL) are prominent real-time extensions of Linear Temporal Logic (LTL). In general, the satisfiability checking…

cs.LO2018

Büchi-Kamp Theorems for 1-clock ATA

Shankara Narayanan Krishna, Khushraj Madnani, Paritosh Pandya

This paper investigates Kamp-like and Büchi-like theorems for 1-clock Alternating Timed Automata (1-ATA) and its natural subclasses. A notion of 1-ATA with loop-free-resets is defi…