4 citations · 11 across the 6 of their papers we have counts for
6 papers
Quantum Circuit Simulation with Fast Tensor Decision Diagram
Qirui Zhang, Mehdi Saligane, Hun-Seok Kim +3
Quantum circuit simulation is a challenging computational problem crucial for quantum computing research and development. The predominant approaches in this area center on tensor n…
Hardware Acceleration for Third-Generation FHE and PSI Based on It
Zhehong Wang, Dennis Sylvester, Hun-Seok Kim +1
With the expansion of cloud services, serious concerns about the privacy of users' data arise due to the exposure of the unencrypted data to the server during computation. Various…
Millimeter-Scale Ultra-Low-Power Imaging System for Intelligent Edge Monitoring
Andrea Bejarano-Carbo, Hyochan An, Kyojin Choo +5
Millimeter-scale embedded sensing systems have unique advantages over larger devices as they are able to capture, analyze, store, and transmit data at the source while being unobtr…
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks
Charles Eckert, Xiaowei Wang, Jingcheng Wang +5
This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep…
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage
Robert Bai, Nam-Sung Kim, Tae Ho Kgil +2
In this paper, we investigate the impact of T_{ox} and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a…
DVS for On-Chip Bus Designs Based on Timing Error Correction
Himanshu Kaul, Dennis Sylvester, David Blaauw +2
On-chip buses are typically designed to meet performance constraints at worst-case conditions, including process corner, temperature, IR-drop, and neighboring net switching pattern…