10 citations · 10 across the 3 of their papers we have counts for
3 papers
cs.AR2018
Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach
Yuzhe Ma, Subhendu Roy, Jin Miao +2
In spite of maturity to the modern electronic design automation (EDA) tools, optimized designs at architectural stage may become sub-optimal after going through physical design flo…
cs.OH2014
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting (JM3 Special Session)
Bei Yu, Subhendu Roy, Jhih-Rong Gao +1
Triple patterning lithography (TPL) is one of the most promising techniques in the 14nm logic node and beyond. Conventional LELELE type TPL technology suffers from native conflict…
cs.AR2014★ 10 cited
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting
Bei Yu, Jhih-Rong Gao, David Z. Pan
Triple patterning lithography (TPL) is one of the most promising techniques in the 14nm logic node and beyond. However, traditional LELELE type TPL technology suffers from native c…