375 citations · 441 across the 12 of their papers we have counts for
7 papers · 1 filter
A Cycle-Accurate Soft Error Vulnerability Analysis Framework for FPGA-based Designs
Eduardo Rhod, Behnam Ghavami, Zhenman Fang +1
Many aerospace and automotive applications use FPGAs in their designs due to their low power and reconfigurability requirements. Meanwhile, such applications also pose a high stand…
HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers
Peiyan Dong, Mengshu Sun, Alec Lu +8
While vision transformers (ViTs) have continuously achieved new milestones in the field of computer vision, their sophisticated network architectures with high computation and memo…
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
Licheng Guo, Yuze Chi, Jason Lau +9
In this paper, we propose TAPA, an end-to-end framework that compiles a C++ task-parallel dataflow program into a high-frequency FPGA accelerator. Compared to existing solutions, T…
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
Weikang Qiao, Licheng Guo, Zhenman Fang +2
The emergence of high-bandwidth memory (HBM) brings new opportunities to boost the performance of sorting acceleration on FPGAs, which was conventionally bounded by the available o…
SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs
Kiarash Saremi, Hossein Pedram, Behnam Ghavami +3
Nowadays nanoscale combinational circuits are facing significant reliability challenges including soft errors and process variations. This paper presents novel process variation-aw…
Best-Effort FPGA Programming: A Few Steps Can Go a Long Way
Jason Cong, Zhenman Fang, Yuchen Hao +4
FPGA-based heterogeneous architectures provide programmers with the ability to customize their hardware accelerators for flexible acceleration of many workloads. Nonetheless, such…