48 citations · 73 across the 4 of their papers we have counts for
4 papers
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
AutoAccel: Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture
Jason Cong, Peng Wei, Cody Hao Yu +1
CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. Thes…
Best-Effort FPGA Programming: A Few Steps Can Go a Long Way
Jason Cong, Zhenman Fang, Yuchen Hao +4
FPGA-based heterogeneous architectures provide programmers with the ability to customize their hardware accelerators for flexible acceleration of many workloads. Nonetheless, such…
Revisiting FPGA Acceleration of Molecular Dynamics Simulation with Dynamic Data Flow Behavior in High-Level Synthesis
Jason Cong, Zhenman Fang, Hassan Kianinejad +1
Molecular dynamics (MD) simulation is one of the past decade's most important tools for enabling biology scientists and researchers to explore human health and diseases. However, d…