4 papers
An Automated System for Checking Lithography Friendliness of Standard Cells
I-Lun Tseng, Yongfu Li, Valerio Perez +3
At advanced process nodes, lithography weakpoints can exist in physical layouts of integrated circuit designs even if the layouts pass design rule checking (DRC). Existence of lith…
Context-Aware DFM Rule Analysis and Scoring Using Machine Learning
Vikas Tripathi, Valerio Perez, Yongfu Li +3
To evaluate the quality of physical layout designs in terms of manufacturability, DFM rule scoring techniques have been widely used in physical design and physical verification pha…
Creation and Fixing of Lithography Hotspots with Synopsys Tools
I-Lun Tseng, Valerio Perez, Yongfu Li +3
At advanced process nodes, pattern matching techniques have been used in the detection of lithography hotspots, which can affect yields of manufactured integrated circuits. Althoug…
Advanced In-Design Auto-Fixing Flow for Cell Abutment Pattern Matching Weakpoints
Yongfu Li, Valerio Perez, I-Lun Tseng +4
Pattern matching design verification has gained noticeable attention in semiconductor technologies as it can precisely identify more localized problematic areas (weakpoints) in the…