3 citations · 6 across the 8 of their papers we have counts for
8 papers
An Automated System for Checking Lithography Friendliness of Standard Cells
I-Lun Tseng, Yongfu Li, Valerio Perez +3
At advanced process nodes, lithography weakpoints can exist in physical layouts of integrated circuit designs even if the layouts pass design rule checking (DRC). Existence of lith…
Context-Aware DFM Rule Analysis and Scoring Using Machine Learning
Vikas Tripathi, Valerio Perez, Yongfu Li +3
To evaluate the quality of physical layout designs in terms of manufacturability, DFM rule scoring techniques have been widely used in physical design and physical verification pha…
Creation and Fixing of Lithography Hotspots with Synopsys Tools
I-Lun Tseng, Valerio Perez, Yongfu Li +3
At advanced process nodes, pattern matching techniques have been used in the detection of lithography hotspots, which can affect yields of manufactured integrated circuits. Althoug…
Standard Cell Library Evaluation with Multiple lithography-compliant verification and Improved Synopsys Pin Access Checking Utility
Yongfu Li, Wan Chia Ang, Chin Hui Lee +3
While standard cell layouts are drawn with minimum design rules to maximize the benefit of design area shrinkage, the complicated design rules have caused difficulties with signal…
Multiple-Lithography-Compliant Verification for Standard Cell Library Development Flow
Yongfu Li, Wan Chia Ang, Chin Hui Lee +3
Starting from 22-nm, a standard cell must be designed to be full lithography-compliant, which includes Design Rule Check, Design-for-Manufacturability and Double-Patterning complia…
Advanced In-Design Auto-Fixing Flow for Cell Abutment Pattern Matching Weakpoints
Yongfu Li, Valerio Perez, I-Lun Tseng +4
Pattern matching design verification has gained noticeable attention in semiconductor technologies as it can precisely identify more localized problematic areas (weakpoints) in the…
In Design DFM Rule Scoring and Fixing Method using ICV
Vikas Tripathi, Yongfu Li, Zhao Chuan Lee +3
As compared to DRC rules, DFM rules are a list of selected recommended rules which aim to improve the design margins for better manufacturability. In GLOBALFOUNDRIES, we use DFM sc…
Constraining the Synopsys Pin Access Checker Utility for Improved Standard Cells Library Verification Flow
Yongfu Li, Chin Hui Lee, Wan Chia Ang +3
While standard cell layouts are drawn with minimum design rules for maximum benefit of design area shrinkage, the complicated design rules begin to cause difficulties with signal r…