30 citations · 33 across the 4 of their papers we have counts for
5 papers
Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models
Jingbo Zhou, Xinmiao Zhang
Deep neural networks (DNNs) are utilized in numerous image processing, object detection, and video analysis tasks and need to be implemented using hardware accelerators to achieve…
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography
Weihang Tan, Antian Wang, Yingjie Lao +2
This paper presents a low-latency hardware accelerator for modular polynomial multiplication for lattice-based post-quantum cryptography and homomorphic encryption applications. Th…
Algorithmic Obfuscation for LDPC Decoders
Jingbo Zhou, Xinmiao Zhang
In order to protect intellectual property against untrusted foundry, many logic-locking schemes have been developed. The main idea of logic locking is to insert a key-controlled bl…
Generalized SAT-Attack-Resistant Logic Locking
Jingbo Zhou, Xinmiao Zhang
Logic locking is used to protect integrated circuits (ICs) from piracy and counterfeiting. An encrypted IC implements the correct function only when the right key is input. Many ex…
Reduced-Complexity Column-Layered Decoding and Implementation for LDPC Codes
Zhiqiang Cui, Zhongfeng Wang, Xinmiao Zhang
Layered decoding is well appreciated in Low-Density Parity-Check (LDPC) decoder implementation since it can achieve effectively high decoding throughput with low computation comple…