3 citations · 3 across the 2 of their papers we have counts for
2 papers
cs.CR2022★ 3 cited
Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis
Pantea Kiaei, Yuan Yao, Zhenyuan Liu +7
While side-channel leakage is traditionally evaluated from a fabricated chip, it is more time-efficient and cost-effective to do so during the design phase of the chip. We present…
cs.CR2020
Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection
Pantea Kiaei, Cees-Bart Breunesse, Mohsen Ahmadi +2
Fault injection attacks can cause errors in software for malicious purposes. Oftentimes, vulnerable points of a program are detected after its development. It is therefore critical…