activity
20202026
most citedA tutorial on the Bayesian statistical approach to inverse problems

13 citations · 14 across the 9 of their papers we have counts for

collaborators

10 papers

cs.AR2026

LLMET: Enabling Cross-Layer Evaluation of Emerging M3D Memories for Energy-Efficient LLM Serving

Ming-Yen Lee, Hanchen Yang, Faaiq Waqar +4

The energy consumption of Large Language Model (LLM) serving is becoming a major system challenge as deployment scales, driven by hardware power and thermal constraints and rising…

cs.AR2025

Hardware Acceleration of Kolmogorov-Arnold Network (KAN) in Large-Scale Systems

Wei-Hsing Huang, Jianwei Jia, Yuyao Kong +4

Recent developments have introduced Kolmogorov-Arnold Networks (KAN), an innovative architectural paradigm capable of replicating conventional deep neural network (DNN) capabilitie…

cs.AR2025

Architecting Long-Context LLM Acceleration with Packing-Prefetch Scheduler and Ultra-Large Capacity On-Chip Memories

Ming-Yen Lee, Faaiq Waqar, Hanchen Yang +3

Long-context Large Language Model (LLM) inference faces increasing compute bottlenecks as attention calculations scale with context length, primarily due to the growing KV-cache tr…

cs.AR2025

A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration

Wei-Hsing Huang, Janak Sharda, Cheng-Jhih Shih +6

Conventional large language models (LLMs) are equipped with dozens of GB to TB of model parameters, making inference highly energy-intensive and costly as all the weights need to b…

cs.ET2025

CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms

Faaiq Waqar, Ming-Yen Lee, Seongwon Yoon +2

In contemporary general-purpose graphics processing units (GPGPUs), the continued increase in raw arithmetic throughput is constrained by the capabilities of the register file (sin…

cs.ET2025

Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache

Faaiq Waqar, Jungyoun Kwak, Junmo Lee +4

The Last Level Cache (LLC) is the processor's critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low operation energy. To…

cs.ET2025

Monolithic 3D FPGAs Utilizing Back-End-of-Line Configuration Memories

Faaiq Waqar, Jiahao Zhang, Anni Lu +3

This work presents a novel monolithic 3D (M3D) FPGA architecture that leverages stackable back-end-of-line (BEOL) transistors to implement configuration memory and pass gates, sign…

cs.AR2024

Hardware Acceleration of Kolmogorov-Arnold Network (KAN) for Lightweight Edge Inference

Wei-Hsing Huang, Jianwei Jia, Yuyao Kong +4

Recently, a novel model named Kolmogorov-Arnold Networks (KAN) has been proposed with the potential to achieve the functionality of traditional deep neural networks (DNNs) using or…

stat.ME2023★ 13 cited

A tutorial on the Bayesian statistical approach to inverse problems

Faaiq G. Waqar, Swati Patel, Cory M. Simon

Inverse problems are ubiquitous in the sciences and engineering. Two categories of inverse problems concerning a physical system are (1) estimate parameters in a model of the syste…

cond-mat.mtrl-sci2020★ 1 cited

Towards explainable message passing networks for predicting carbon dioxide adsorption in metal-organic frameworks

Ali Raza, Faaiq Waqar, Arni Sturluson +2

Metal-organic framework (MOFs) are nanoporous materials that could be used to capture carbon dioxide from the exhaust gas of fossil fuel power plants to mitigate climate change. In…