3 citations · 3 across the 2 of their papers we have counts for
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cs.AR2024
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution
Rahul Bera, Adithya Ranganathan, Joydeep Rakshit +8
Load instructions often limit instruction-level parallelism (ILP) in modern processors due to data and resource dependences they cause. Prior techniques like Load Value Prediction…
cs.AR2020★ 3 cited
Proximu$: Efficiently Scaling DNN Inference in Multi-core CPUs through Near-Cache Compute
Anant V. Nori, Rahul Bera, Shankar Balachandran +5
Deep Neural Network (DNN) inference is emerging as the fundamental bedrock for a multitude of utilities and services. CPUs continue to scale up their raw compute capabilities for D…