19 citations · 32 across the 8 of their papers we have counts for
8 papers
CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions
Simone Manoni, Emanuele Parisi, Riccardo Tedeschi +3
This work presents the first design, integration, and evaluation of the standard RISC-V extensions for Control-Flow Integrity (CFI). The Zicfiss and Zicfilp extensions aim at prote…
Efficient Trace for RISC-V: Design, Evaluation, and Integration in CVA6
Umberto Laghi, Simone Manoni, Emanuele Parisi +1
In this work, we present the design and evaluation of a Processor Tracing System compliant with the RISC-V Efficient Trace specification for Instruction Branch Tracing. We integrat…
Unleashing OpenTitan's Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading
Maicol Ciani, Emanuele Parisi, Alberto Musa +7
The rapid advancement and exploration of open-hardware RISC-V platforms are driving significant changes in sectors like autonomous vehicles, smart-city infrastructure, and medical…
Assessing the Performance of OpenTitan as Cryptographic Accelerator in Secure Open-Hardware System-on-Chips
Emanuele Parisi, Alberto Musa, Maicol Ciani +4
RISC-V open-source systems are emerging in deployment scenarios where safety and security are critical. OpenTitan is an open-source silicon root-of-trust designed to be deployed in…
TitanCFI: Toward Enforcing Control-Flow Integrity in the Root-of-Trust
Emanuele Parisi, Alberto Musa, Simone Manoni +5
Modern RISC-V platforms control and monitor security-critical systems such as industrial controllers and autonomous vehicles. While these platforms feature a Root-of-Trust (RoT) to…
Experimenting with Emerging RISC-V Systems for Decentralised Machine Learning
Gianluca Mittone, Nicolò Tonci, Robert Birke +10
Decentralised Machine Learning (DML) enables collaborative machine learning without centralised input data. Federated Learning (FL) and Edge Inference are examples of DML. While to…
Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers
Andrea Bartolini, Federico Ficarelli, Emanuele Parisi +9
The new open and royalty-free RISC-V ISA is attracting interest across the whole computing continuum, from microcontrollers to supercomputers. High-performance RISC-V processors an…
Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers
Emanuele Parisi, Francesco Barchi, Andrea Bartolini +2
The analysis of source code through machine learning techniques is an increasingly explored research topic aiming at increasing smartness in the software toolchain to exploit moder…