19 citations · 23 across the 4 of their papers we have counts for
5 papers
AIvril: AI-Driven RTL Generation With Verification In-The-Loop
Mubashir ul Islam, Humza Sami, Pierre-Emmanuel Gaillardon +1
Large Language Models (LLMs) are computational models capable of performing complex natural language processing tasks. Leveraging these capabilities, LLMs hold the potential to tra…
ALICE: An Automatic Design Flow for eFPGA Redaction
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari +6
Fabricating an integrated circuit is becoming unaffordable for many semiconductor design houses. Outsourcing the fabrication to a third-party foundry requires methods to protect th…
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan +6
Semiconductor design houses rely on third-party foundries to manufacture their integrated circuits (IC). While this trend allows them to tackle fabrication costs, it introduces sec…
Exploring eFPGA-based Redaction for IP Protection
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan +6
Recently, eFPGA-based redaction has been proposed as a promising solution for hiding parts of a digital design from untrusted entities, where legitimate end-users can restore funct…
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization
Shubham Rai, Walter Lau Neto, Yukio Miyasaka +37
Logic synthesis is a fundamental step in hardware design whose goal is to find structural representations of Boolean functions while minimizing delay and area. If the function is c…