1 citations · 1 across the 2 of their papers we have counts for
2 papers
cs.AR2021
Design of a Dynamic Parameter-Controlled Chaotic-PRNG in a 65nm CMOS process
Partha Sarathi Paul, Maisha Sadia, Md Sakib Hasan
In this paper, we present the design of a new chaotic map circuit with a 65nm CMOS process. This chaotic map circuit uses a dynamic parameter-control topology and generates a wide…
eess.SY2021★ 1 cited
Design of an Enhanced Reconfigurable Chaotic Oscillator using G4FET-NDR Based Discrete Map
Md Sakib Hasan, Aysha S. Shanta, Partha Sarathi Paul +3
In this paper, a novel chaotic map is introduced usinga voltage controlled negative differential resistance (NDR) circuitcomposed of ann-channel and ap-channel silicon-on-insulator…