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cs.AR2026
Exposing Embedded Matrix Multiplication with polyhedral transformations for CGRA compilation
Yuxuan Wang, María José Belda, Fernando Castro +3
Matrix-matrix multiplication (mmul) is a dominant computing pattern in edge workloads, but in real applications it is often embedded within larger affine programs and intertwined w…
cs.AR2024
SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs
Cristian Tirelli, Juan Sapriza, Rubén Rodríguez Álvarez +6
Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing…
cs.AR2021
DB4HLS: A Database of High-Level Synthesis Design Space Explorations
Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni +3
High-Level Synthesis (HLS) frameworks allow to easily specify a large number of variants of the same hardware design by only acting on optimization directives. Nonetheless, the har…